Intel® Stratix® 10 FPGA Features and Benefits

Up to 2x Core Performance¹

The ground breaking Intel® Hyperflex™ FPGA Architecture delivers up to 2X the core performance.1 With the Intel® Stratix® 10 family, you can extract high levels of performance with up to 8.6 TFLOPS of single-precision floating-point DSP performance and up to twenty 100 GbE interfaces.

Up to 7x Transceiver Bandwidth vs. Previous Generation FPGA¹

Breakthrough Bandwidth Barrier with up to 144 transceivers in a single device, with data rates up to 57.8 Gbps PAM-4 and 28.9 Gbps NRZ. Up to 287.5 Gbps of DDR4 memory bandwidth. Up to 512 Gbps of HBM2 memory bandwidth. PCI Express hard and soft IP support up to 4.0 x16 at 16 GT/s per lane. Intel® Ultra Path Interconnect (Intel® UPI) hard IP with up to 20 lanes at 11.2 GT/s for direct cache coherent connection to future select Intel® Xeon® Scalable processors.

Up to 16 GB of HBM2 Memory in Package

Achieve higher system integration with the largest monolithic FPGA device with 2.8 million LEs and heterogeneous 3D SiP solutions including transceivers and other advanced components such as HBM2. Other system support includes standard external memories and Intel® Optane™ memory products. Intel® Stratix® 10 SoC FPGA comes packed with a 64 bit quad-core ARM* Cortex-A53 up to 1.35 GHz with hardened peripherals and high bandwidth interfaces directly to FPGA fabric at 30 Gbps.

Up to 143 INT8 TOPS or 286 INT4 TOPS² for High Throughput AI Applications

The Intel® Stratix® 10 NX FPGA embeds a new type of AI-optimized block called the AI Tensor Block. The AI Tensor Block is tuned for the common matrix-matrix or vector-matrix multiplications used in AI computations, with capabilities designed to work efficiently for both small and large matrix sizes. A single AI Tensor Block achieves 143 INT8 TOPS or 286 INT4 TOPS.²

Intel® Hyperflex™ FPGA Architecture

To address the challenges presented by next-generation systems, Intel® Stratix® 10 FPGA and SoC FPGA feature the new Intel® Hyperflex™ FPGA Architecture, which delivers 2X the clock frequency performance and up to 70% lower power compared to previous-generation, high-end FPGA.¹

Heterogeneous 3D Integration

Intel® Stratix® 10 FPGA and SoC FPGA leverage heterogeneous 3D System-in-Package (SiP) technology to integrate a monolithic FPGA core fabric with 3D SiP transceiver tiles and other advanced components in a single package.

Transceivers

Intel® Stratix® 10 FPGA and SoC FPGA deliver a new era of transceiver technology with the introduction of innovative heterogeneous 3D System-in-Package (SiP) transceivers.

External Memory Interfaces

Intel® Stratix® 10 devices provide memory interface support, including serial, parallel interfaces, and selected Intel® Optane™ DC persistent memory.

AI Tensor Blocks

The Intel® Stratix® 10 NX FPGA embeds a new type of AI-optimized block called the AI Tensor Block. The AI Tensor Block is tuned for the common matrix-matrix or vector-matrix multiplications used in AI computations, with capabilities designed to work efficiently for both small and large matrix sizes. A single AI Tensor Block achieves up to 15X more INT82 throughput than standard Intel® Stratix® 10 FPGA DSP Block.

DSP

With Intel® Stratix® 10 devices, digital signal processing (DSP) designs can achieve up to 8.6 Tera floating point operations per second (TFLOPS) of IEEE 754 single-precision floating-point operations.

Interconnect to CPUs, ASICs, and ASSPs

Intel® Stratix® 10 DX devices accelerate applications used in Data Center, Networking, Cloud Computing, and Test & Measurement markets through hard and soft intellectual property blocks supporting both UPI and PCIe 4.0 interfaces.

Hard Processor System

Building on Intel's leadership in SoCs, Intel® Stratix® 10 SoC FPGA includes a next-generation hard processor system (HPS) to deliver the industry's highest performance and most power-efficient SoCs.